II.
Specialization overview
Reference · livespecialization:fpga-programming
specialization:fpga-programming overview
Inspect the raw attributes, linked wiki pages, and inbound or outbound graph edges for specialization:fpga-programming.
Attributes
No attributes.
Outgoing edges
specializes1
- domain:embedded-systems·DomainEmbedded Systems
uses_tool1
- tool:make·ToolGNU Make
Incoming edges
applies_to4
- skill-area:hdl-design·SkillAreaHDL Design
- skill-area:fpga-synthesis·SkillAreaFPGA Synthesis Flow
- skill-area:timing-closure·SkillAreaTiming Closure
- skill-area:hardware-verification-uvm·SkillAreaHardware Verification (UVM)
contains2
- domain:semiconductor-design·DomainSemiconductor Design
- domain:embedded-systems·DomainEmbedded Systems
documents1
- page:library-fpga-programming·PageFPGA Programming and Hardware Description Specialization (Library)
lib_belongs_to_specialization56
- lib-agent:fpga-programming--axi-expert·LibraryAgentaxi-expert
- lib-agent:fpga-programming--cdc-expert·LibraryAgentcdc-expert
- lib-agent:fpga-programming--embedded-fpga-expert·LibraryAgentembedded-fpga-expert
- lib-agent:fpga-programming--fpga-architect·LibraryAgentfpga-architect
- lib-agent:fpga-programming--fpga-debug-expert·LibraryAgentfpga-debug-expert
- lib-agent:fpga-programming--fpga-timing-expert·LibraryAgentfpga-timing-expert
- lib-agent:fpga-programming--hls-expert·LibraryAgenthls-expert
- lib-agent:fpga-programming--intel-specialist·LibraryAgentintel-specialist
- lib-agent:fpga-programming--rtl-design-expert·LibraryAgentrtl-design-expert
- lib-agent:fpga-programming--synthesis-expert·LibraryAgentsynthesis-expert
- lib-agent:fpga-programming--verification-expert·LibraryAgentverification-expert
- lib-agent:fpga-programming--xilinx-specialist·LibraryAgentxilinx-specialist
- lib-process:fpga-programming--axi-interface-design·LibraryProcessspecializations/fpga-programming/axi-interface-design
- lib-process:fpga-programming--cdc-design·LibraryProcessspecializations/fpga-programming/cdc-design
- lib-process:fpga-programming--clock-network-design·LibraryProcessspecializations/fpga-programming/clock-network-design
- lib-process:fpga-programming--constrained-random-verification·LibraryProcessspecializations/fpga-programming/constrained-random-verification
- lib-process:fpga-programming--design-for-testability·LibraryProcessspecializations/fpga-programming/design-for-testability
- lib-process:fpga-programming--fpga-on-chip-debugging·LibraryProcessspecializations/fpga-programming/fpga-on-chip-debugging
- lib-process:fpga-programming--fsm-design·LibraryProcessspecializations/fpga-programming/fsm-design
- lib-process:fpga-programming--functional-simulation·LibraryProcessspecializations/fpga-programming/functional-simulation
- lib-process:fpga-programming--hardware-software-codesign·LibraryProcessspecializations/fpga-programming/hardware-software-codesign
- lib-process:fpga-programming--hls-development·LibraryProcessspecializations/fpga-programming/hls-development
- lib-process:fpga-programming--ip-core-integration·LibraryProcessspecializations/fpga-programming/ip-core-integration
- lib-process:fpga-programming--memory-interface-design·LibraryProcessspecializations/fpga-programming/memory-interface-design
- lib-process:fpga-programming--pipeline-architecture·LibraryProcessspecializations/fpga-programming/pipeline-architecture
- lib-process:fpga-programming--place-and-route·LibraryProcessspecializations/fpga-programming/place-and-route
- lib-process:fpga-programming--power-analysis-optimization·LibraryProcessspecializations/fpga-programming/power-analysis-optimization
- lib-process:fpga-programming--reset-strategy·LibraryProcessspecializations/fpga-programming/reset-strategy
- lib-process:fpga-programming--rtl-module-architecture·LibraryProcessspecializations/fpga-programming/rtl-module-architecture
- lib-process:fpga-programming--sva-development·LibraryProcessspecializations/fpga-programming/sva-development
- lib-process:fpga-programming--synthesis-optimization·LibraryProcessspecializations/fpga-programming/synthesis-optimization
- lib-process:fpga-programming--testbench-development·LibraryProcessspecializations/fpga-programming/testbench-development
- lib-process:fpga-programming--timing-closure·LibraryProcessspecializations/fpga-programming/timing-closure
- lib-process:fpga-programming--timing-constraints·LibraryProcessspecializations/fpga-programming/timing-constraints
- lib-process:fpga-programming--uvm-testbench·LibraryProcessspecializations/fpga-programming/uvm-testbench
- lib-process:fpga-programming--verilog-systemverilog-design·LibraryProcessspecializations/fpga-programming/verilog-systemverilog-design
- lib-process:fpga-programming--vhdl-module-development·LibraryProcessspecializations/fpga-programming/vhdl-module-development
- lib-skill:fpga-programming--axi-protocol·LibrarySkillaxi-protocol
- lib-skill:fpga-programming--cdc-analysis·LibrarySkillcdc-analysis
- lib-skill:fpga-programming--formal-verification·LibrarySkillformal-verification
- lib-skill:fpga-programming--fpga-debugging·LibrarySkillfpga-debugging
- lib-skill:fpga-programming--fsm-design·LibrarySkillfsm-design
- lib-skill:fpga-programming--hardware-verification-uvm·LibrarySkillhardware-verification-uvm
- lib-skill:fpga-programming--hdl-simulation·LibrarySkillhdl-simulation
- lib-skill:fpga-programming--hls-cpp-to-rtl·LibrarySkillhls-cpp-to-rtl
- lib-skill:fpga-programming--ip-core-management·LibrarySkillip-core-management
- lib-skill:fpga-programming--memory-interfaces·LibrarySkillmemory-interfaces
- lib-skill:fpga-programming--place-and-route·LibrarySkillplace-and-route
- lib-skill:fpga-programming--power-analysis·LibrarySkillpower-analysis
- lib-skill:fpga-programming--rtl-linting·LibrarySkillrtl-linting
- lib-skill:fpga-programming--sva-assertions·LibrarySkillsva-assertions
- lib-skill:fpga-programming--synthesis-optimization·LibrarySkillsynthesis-optimization
- lib-skill:fpga-programming--timing-constraints·LibrarySkilltiming-constraints
- lib-skill:fpga-programming--uvm-methodology·LibrarySkilluvm-methodology
- lib-skill:fpga-programming--verilog-sv-language·LibrarySkillverilog-sv-language
- lib-skill:fpga-programming--vhdl-language·LibrarySkillvhdl-language
requires_skill1
- role:embedded-engineer·RoleEmbedded Engineer