II.
Specialization JSON
Structured · livespecialization:fpga-programming
specialization:fpga-programming json
Inspect the normalized record payload exactly as the atlas UI reads it.
{
"id": "specialization:fpga-programming",
"_kind": "Specialization",
"_file": "domain/specializations/spec-tool-bridges.yaml",
"_cluster": "domain",
"attributes": {},
"outgoingEdges": [
{
"from": "specialization:fpga-programming",
"to": "tool:make",
"kind": "uses_tool"
},
{
"from": "specialization:fpga-programming",
"to": "domain:embedded-systems",
"kind": "specializes"
}
],
"incomingEdges": [
{
"from": "domain:semiconductor-design",
"to": "specialization:fpga-programming",
"kind": "contains"
},
{
"from": "domain:embedded-systems",
"to": "specialization:fpga-programming",
"kind": "contains"
},
{
"from": "role:embedded-engineer",
"to": "specialization:fpga-programming",
"kind": "requires_skill",
"attributes": {
"level": "intermediate"
}
},
{
"from": "skill-area:hdl-design",
"to": "specialization:fpga-programming",
"kind": "applies_to",
"attributes": {
"confidence": "primary"
}
},
{
"from": "skill-area:fpga-synthesis",
"to": "specialization:fpga-programming",
"kind": "applies_to",
"attributes": {
"confidence": "primary"
}
},
{
"from": "skill-area:timing-closure",
"to": "specialization:fpga-programming",
"kind": "applies_to",
"attributes": {
"confidence": "primary"
}
},
{
"from": "skill-area:hardware-verification-uvm",
"to": "specialization:fpga-programming",
"kind": "applies_to",
"attributes": {
"confidence": "primary"
}
},
{
"from": "lib-agent:fpga-programming--axi-expert",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-agent:fpga-programming--cdc-expert",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-agent:fpga-programming--embedded-fpga-expert",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-agent:fpga-programming--fpga-architect",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-agent:fpga-programming--fpga-debug-expert",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-agent:fpga-programming--fpga-timing-expert",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-agent:fpga-programming--hls-expert",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-agent:fpga-programming--intel-specialist",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-agent:fpga-programming--rtl-design-expert",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-agent:fpga-programming--synthesis-expert",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-agent:fpga-programming--verification-expert",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-agent:fpga-programming--xilinx-specialist",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--axi-interface-design",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--cdc-design",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--clock-network-design",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--constrained-random-verification",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--design-for-testability",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--fpga-on-chip-debugging",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--fsm-design",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--functional-simulation",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--hardware-software-codesign",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--hls-development",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--ip-core-integration",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--memory-interface-design",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--pipeline-architecture",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--place-and-route",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--power-analysis-optimization",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--reset-strategy",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--rtl-module-architecture",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--sva-development",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--synthesis-optimization",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--testbench-development",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--timing-closure",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--timing-constraints",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--uvm-testbench",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--verilog-systemverilog-design",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--vhdl-module-development",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--axi-protocol",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--cdc-analysis",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--formal-verification",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--fpga-debugging",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--fsm-design",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--hardware-verification-uvm",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--hdl-simulation",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--hls-cpp-to-rtl",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--ip-core-management",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--memory-interfaces",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--place-and-route",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--power-analysis",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--rtl-linting",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--sva-assertions",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--synthesis-optimization",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--timing-constraints",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--uvm-methodology",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--verilog-sv-language",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--vhdl-language",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
},
{
"from": "page:library-fpga-programming",
"to": "specialization:fpga-programming",
"kind": "documents"
}
]
}