II.
LibraryProcess overview
Reference · livelib-process:fpga-programming--place-and-route
specializations/fpga-programming/place-and-route overview
Place and Route Optimization - Optimize placement and routing to achieve timing closure and minimize resource utilization. Use floorplanning, placement constraints, and routing directives.
Attributes
displayName
specializations/fpga-programming/place-and-route
description
Place and Route Optimization - Optimize placement and routing to achieve timing closure and minimize
resource utilization. Use floorplanning, placement constraints, and routing directives.
libraryPath
library/specializations/fpga-programming/place-and-route.js
specialization
fpga-programming
references
- - Vivado Implementation: https://docs.amd.com/r/en-US/ug904-vivado-implementation
- - Quartus Fitter: https://www.intel.com/content/www/us/en/programmable/documentation/mwh1409960181641.html
example
const result = await orchestrate('specializations/fpga-programming/place-and-route', {
designName: 'image_processor',
targetDevice: 'Intel Agilex AGFB014R24B',
targetFrequency: 400,
floorplanStrategy: 'hierarchical'
});
usesAgents
- implementation-engineer
Outgoing edges
lib_applies_to_domain1
- domain:embedded-systems·DomainEmbedded Systems
lib_belongs_to_specialization1
- specialization:fpga-programming·Specialization
lib_implements_workflow1
- workflow:hardware-software-integration·WorkflowHardware-Software Integration
lib_involves_role1
- role:embedded-engineer·RoleEmbedded Engineer
lib_requires_skill_area3
- skill-area:hdl-design·SkillAreaHDL Design
- skill-area:fpga-synthesis·SkillAreaFPGA Synthesis Flow
- skill-area:timing-closure·SkillAreaTiming Closure
uses_agent1
- lib-agent:shared--implementation-engineer·LibraryAgentimplementation-engineer
Incoming edges
None.