II.
LibrarySkill overview
Reference · livelib-skill:fpga-programming--cdc-analysis
cdc-analysis overview
Specialized skill for clock domain crossing analysis and synchronizer design in FPGA designs
Attributes
displayName
cdc-analysis
description
Specialized skill for clock domain crossing analysis and synchronizer design in FPGA designs
libraryPath
library/specializations/fpga-programming/skills/cdc-analysis/SKILL.md
specialization
fpga-programming
contentSummary
# CDC Analysis Skill
## Overview
Expert skill for Clock Domain Crossing (CDC) analysis and synchronizer design, ensuring metastability-safe multi-clock FPGA designs.
## Capabilities
- Identify all clock domain crossings in RTL
- Design 2FF and 3FF synchronizers with ASYNC_REG
- Implement Gray co
Outgoing edges
lib_applies_to_domain1
- domain:embedded-systems·DomainEmbedded Systems
lib_belongs_to_specialization1
- specialization:fpga-programming·Specialization
lib_involves_role1
- role:embedded-engineer·RoleEmbedded Engineer
lib_requires_skill_area2
- skill-area:hdl-design·SkillAreaHDL Design
- skill-area:fpga-synthesis·SkillAreaFPGA Synthesis Flow
Incoming edges
None.