II.
LibrarySkill overview
Reference · livelib-skill:fpga-programming--formal-verification
formal-verification overview
Formal property verification and model checking skill for FPGA designs
Attributes
displayName
formal-verification
description
Formal property verification and model checking skill for FPGA designs
libraryPath
library/specializations/fpga-programming/skills/formal-verification/SKILL.md
specialization
fpga-programming
contentSummary
# Formal Verification Skill
## Overview
Expert skill for formal property verification and model checking, enabling exhaustive verification of FPGA design properties without simulation.
## Capabilities
- Write properties for formal verification
- Configure formal tool constraints
- Analyze formal
Outgoing edges
lib_applies_to_domain1
- domain:embedded-systems·DomainEmbedded Systems
lib_belongs_to_specialization1
- specialization:fpga-programming·Specialization
lib_involves_role1
- role:embedded-engineer·RoleEmbedded Engineer
lib_requires_skill_area2
- skill-area:hdl-design·SkillAreaHDL Design
- skill-area:fpga-synthesis·SkillAreaFPGA Synthesis Flow
Incoming edges
None.