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Agentic AI Atlas · FPGA Engineer
role:fpga-engineera5c.ai
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Role overview

role:fpga-engineer

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FPGA Engineer overview

Designs and implements digital logic on field-programmable gate arrays — HDL coding, synthesis, place-and-route, timing closure, and hardware verification using UVM or cocotb.

RoleOutgoing · 8Incoming · 0

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displayName
FPGA Engineer
isAgentic
false
requiredCapabilities
[]
requiredDomains
[]
description
Designs and implements digital logic on field-programmable gate arrays — HDL coding, synthesis, place-and-route, timing closure, and hardware verification using UVM or cocotb.

Outgoing edges

applies_to2
  • domain:embedded-systems·DomainEmbedded Systems
  • domain:semiconductor-design·DomainSemiconductor Design
holds_responsibility2
  • responsibility:performance-optimization·ResponsibilityPerformance Optimization
  • responsibility:test-strategy·ResponsibilityTest Strategy
requires_expertise4
  • skill-area:hdl-design·SkillAreaHDL Design
  • skill-area:fpga-synthesis·SkillAreaFPGA Synthesis Flow
  • skill-area:timing-closure·SkillAreaTiming Closure
  • skill-area:hardware-verification-uvm·SkillAreaHardware Verification (UVM)

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