iiRecord
Agentic AI Atlas · specializations/fpga-programming/uvm-testbench
lib-process:fpga-programming--uvm-testbencha5c.ai
II.
LibraryProcess JSON

lib-process:fpga-programming--uvm-testbench

Structured · live

specializations/fpga-programming/uvm-testbench json

Inspect the normalized record payload exactly as the atlas UI reads it.

File · generated-library/processes.yamlCluster · generated-library
Record JSON
{
  "id": "lib-process:fpga-programming--uvm-testbench",
  "_kind": "LibraryProcess",
  "_file": "generated-library/processes.yaml",
  "_cluster": "generated-library",
  "attributes": {
    "displayName": "specializations/fpga-programming/uvm-testbench",
    "description": "UVM Testbench Architecture - Design and implement Universal Verification Methodology (UVM) testbenches\nfollowing IEEE 1800.2 standard. Create reusable verification components and test infrastructure.",
    "libraryPath": "library/specializations/fpga-programming/uvm-testbench.js",
    "specialization": "fpga-programming",
    "references": [
      "- IEEE 1800.2-2020 UVM Standard: https://standards.ieee.org/standard/1800_2-2020.html",
      "- UVM Reference: https://verificationacademy.com/",
      "- UVM Cookbook: https://www.mentor.com/"
    ],
    "example": "const result = await orchestrate('specializations/fpga-programming/uvm-testbench', {\n  dutName: 'ethernet_mac',\n  interfaces: ['gmii', 'axi_lite', 'interrupt'],\n  uvmVersion: '1.2',\n  reuseLevel: 'high'\n});",
    "usesAgents": [
      "uvm-architect",
      "uvm-engineer"
    ]
  },
  "outgoingEdges": [
    {
      "from": "lib-process:fpga-programming--uvm-testbench",
      "to": "skill-area:hdl-design",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--uvm-testbench",
      "to": "skill-area:fpga-synthesis",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 0.7
      }
    },
    {
      "from": "lib-process:fpga-programming--uvm-testbench",
      "to": "domain:embedded-systems",
      "kind": "lib_applies_to_domain",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--uvm-testbench",
      "to": "role:embedded-engineer",
      "kind": "lib_involves_role",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--uvm-testbench",
      "to": "workflow:hardware-software-integration",
      "kind": "lib_implements_workflow",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--uvm-testbench",
      "to": "specialization:fpga-programming",
      "kind": "lib_belongs_to_specialization",
      "attributes": {
        "weight": 1
      }
    }
  ],
  "incomingEdges": []
}