iiRecord
Agentic AI Atlas · specializations/fpga-programming/sva-development
lib-process:fpga-programming--sva-developmenta5c.ai
II.
LibraryProcess JSON

lib-process:fpga-programming--sva-development

Structured · live

specializations/fpga-programming/sva-development json

Inspect the normalized record payload exactly as the atlas UI reads it.

File · generated-library/processes.yamlCluster · generated-library
Record JSON
{
  "id": "lib-process:fpga-programming--sva-development",
  "_kind": "LibraryProcess",
  "_file": "generated-library/processes.yaml",
  "_cluster": "generated-library",
  "attributes": {
    "displayName": "specializations/fpga-programming/sva-development",
    "description": "SystemVerilog Assertion (SVA) Development - Implement concurrent and immediate assertions to verify\ndesign properties. Create assertion libraries for protocol checking and design intent specification.",
    "libraryPath": "library/specializations/fpga-programming/sva-development.js",
    "specialization": "fpga-programming",
    "references": [
      "- SystemVerilog Assertions: https://www.accellera.org/",
      "- SVA Handbook: https://verificationacademy.com/",
      "- Formal Verification with SVA: https://www.synopsys.com/verification/static-and-formal-verification.html"
    ],
    "example": "const result = await orchestrate('specializations/fpga-programming/sva-development', {\n  designName: 'axi_master',\n  protocols: ['AXI4', 'AXI4-Lite'],\n  designIntentProperties: ['no_deadlock', 'data_integrity', 'handshake_timeout'],\n  assertionLevel: 'comprehensive'\n});",
    "usesAgents": [
      "verification-engineer",
      "sva-engineer"
    ]
  },
  "outgoingEdges": [
    {
      "from": "lib-process:fpga-programming--sva-development",
      "to": "skill-area:hdl-design",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--sva-development",
      "to": "skill-area:fpga-synthesis",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 0.7
      }
    },
    {
      "from": "lib-process:fpga-programming--sva-development",
      "to": "domain:embedded-systems",
      "kind": "lib_applies_to_domain",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--sva-development",
      "to": "role:embedded-engineer",
      "kind": "lib_involves_role",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--sva-development",
      "to": "workflow:hardware-software-integration",
      "kind": "lib_implements_workflow",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--sva-development",
      "to": "specialization:fpga-programming",
      "kind": "lib_belongs_to_specialization",
      "attributes": {
        "weight": 1
      }
    }
  ],
  "incomingEdges": []
}