{
  "id": "lib-process:fpga-programming--design-for-testability",
  "_kind": "LibraryProcess",
  "_file": "generated-library/processes.yaml",
  "_cluster": "generated-library",
  "attributes": {
    "displayName": "specializations/fpga-programming/design-for-testability",
    "description": "Design for Testability (DFT) - Implement JTAG boundary scan, BIST (Built-In Self Test), and production\ntest infrastructure. Enable efficient manufacturing test and field diagnostics.",
    "libraryPath": "library/specializations/fpga-programming/design-for-testability.js",
    "specialization": "fpga-programming",
    "references": [
      "- IEEE 1149.1 JTAG: https://standards.ieee.org/standard/1149_1-2013.html",
      "- IEEE 1500 Embedded Core Test: https://standards.ieee.org/standard/1500-2005.html",
      "- FPGA BIST Techniques: https://docs.amd.com/r/en-US/ug908-vivado-programming-debugging"
    ],
    "example": "const result = await orchestrate('specializations/fpga-programming/design-for-testability', {\n  designName: 'network_processor',\n  testStrategy: 'comprehensive',\n  jtagSupport: true,\n  bistModules: ['memory_bist', 'logic_bist']\n});",
    "usesAgents": [
      "dft-engineer",
      "verification-engineer"
    ]
  },
  "outgoingEdges": [
    {
      "from": "lib-process:fpga-programming--design-for-testability",
      "to": "skill-area:hdl-design",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--design-for-testability",
      "to": "skill-area:fpga-synthesis",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 0.7
      }
    },
    {
      "from": "lib-process:fpga-programming--design-for-testability",
      "to": "domain:embedded-systems",
      "kind": "lib_applies_to_domain",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--design-for-testability",
      "to": "role:embedded-engineer",
      "kind": "lib_involves_role",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--design-for-testability",
      "to": "workflow:architecture-decision-record",
      "kind": "lib_implements_workflow",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--design-for-testability",
      "to": "specialization:fpga-programming",
      "kind": "lib_belongs_to_specialization",
      "attributes": {
        "weight": 1
      }
    }
  ],
  "incomingEdges": []
}