iiRecord
Agentic AI Atlas · PCB Design Review
workflow:pcb-design-reviewa5c.ai
II.
Workflow JSON

workflow:pcb-design-review

Structured · live

PCB Design Review json

Inspect the normalized record payload exactly as the atlas UI reads it.

File · workflows/workflows/workflows-electrical.yamlCluster · workflows
Record JSON
{
  "id": "workflow:pcb-design-review",
  "_kind": "Workflow",
  "_file": "workflows/workflows/workflows-electrical.yaml",
  "_cluster": "workflows",
  "attributes": {
    "displayName": "PCB Design Review",
    "workflowKind": "governance",
    "triggerType": "event-driven",
    "typicalCadence": "per-revision",
    "complexity": "single-team",
    "description": "Reviews printed circuit board designs for manufacturability and\nreliability -- checking DRC/ERC violations, validating\nimpedance-controlled trace routing, auditing power delivery network\ndecoupling strategy, verifying thermal relief pads, confirming BOM\ncomponent availability and lifecycle status, and ensuring compliance\nwith IPC-2221 standards. Excludes schematic capture and component\nselection.\n"
  },
  "outgoingEdges": [
    {
      "from": "workflow:pcb-design-review",
      "to": "role:staff-engineer",
      "kind": "involves_role",
      "attributes": {}
    },
    {
      "from": "workflow:pcb-design-review",
      "to": "role:principal-engineer",
      "kind": "involves_role",
      "attributes": {}
    },
    {
      "from": "workflow:pcb-design-review",
      "to": "role:test-writer",
      "kind": "involves_role",
      "attributes": {}
    },
    {
      "from": "workflow:pcb-design-review",
      "to": "skill-area:hardware-abstraction-layer",
      "kind": "requires_skill_area",
      "attributes": {}
    },
    {
      "from": "workflow:pcb-design-review",
      "to": "skill-area:peripheral-interfacing",
      "kind": "requires_skill_area",
      "attributes": {}
    },
    {
      "from": "workflow:pcb-design-review",
      "to": "domain:electrical-engineering",
      "kind": "applies_to_domain",
      "attributes": {}
    },
    {
      "from": "workflow:pcb-design-review",
      "to": "domain:embedded-systems",
      "kind": "applies_to_domain",
      "attributes": {}
    },
    {
      "from": "workflow:pcb-design-review",
      "to": "responsibility:review-architecture-changes",
      "kind": "triggers_responsibility",
      "attributes": {}
    },
    {
      "from": "workflow:pcb-design-review",
      "to": "responsibility:code-review-coverage",
      "kind": "triggers_responsibility",
      "attributes": {}
    },
    {
      "from": "workflow:pcb-design-review",
      "to": "org-unit:engineering",
      "kind": "performed_by_org_unit",
      "attributes": {}
    },
    {
      "from": "workflow:pcb-design-review",
      "to": "org-unit:quality-engineering",
      "kind": "performed_by_org_unit",
      "attributes": {}
    }
  ],
  "incomingEdges": []
}