II.
LibrarySkill JSON
Structured · livelib-skill:fpga-programming--vhdl-language
vhdl-language json
Inspect the normalized record payload exactly as the atlas UI reads it.
{
"id": "lib-skill:fpga-programming--vhdl-language",
"_kind": "LibrarySkill",
"_file": "generated-library/skills.yaml",
"_cluster": "generated-library",
"attributes": {
"displayName": "vhdl-language",
"description": "Deep expertise in VHDL language constructs, IEEE 1076 standard compliance, and synthesis coding guidelines. Expert skill for generating synthesizable VHDL code.",
"libraryPath": "library/specializations/fpga-programming/skills/vhdl-language/SKILL.md",
"specialization": "fpga-programming",
"contentSummary": "# VHDL Language Skill\n\nExpert skill for VHDL (VHSIC Hardware Description Language) development following IEEE 1076 standards. Provides deep expertise in synthesizable VHDL code generation, coding guidelines, and best practices for FPGA design.\n\n## Overview\n\nThe VHDL Language skill enables comprehens"
},
"outgoingEdges": [
{
"from": "lib-skill:fpga-programming--vhdl-language",
"to": "skill-area:hdl-design",
"kind": "lib_requires_skill_area",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--vhdl-language",
"to": "skill-area:fpga-synthesis",
"kind": "lib_requires_skill_area",
"attributes": {
"weight": 0.7
}
},
{
"from": "lib-skill:fpga-programming--vhdl-language",
"to": "domain:embedded-systems",
"kind": "lib_applies_to_domain",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--vhdl-language",
"to": "role:embedded-engineer",
"kind": "lib_involves_role",
"attributes": {
"weight": 1
}
},
{
"from": "lib-skill:fpga-programming--vhdl-language",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
}
],
"incomingEdges": []
}