{
  "id": "lib-process:fpga-programming--timing-closure",
  "_kind": "LibraryProcess",
  "_file": "generated-library/processes.yaml",
  "_cluster": "generated-library",
  "attributes": {
    "displayName": "specializations/fpga-programming/timing-closure",
    "description": "Timing Closure Strategies - Achieve timing closure through systematic analysis and optimization\ntechniques. Apply RTL modifications, constraint refinements, and tool directives to meet timing requirements.",
    "libraryPath": "library/specializations/fpga-programming/timing-closure.js",
    "specialization": "fpga-programming",
    "references": [
      "- UltraFast Design Methodology: https://docs.amd.com/r/en-US/ug949-vivado-design-methodology",
      "- Timing Closure: https://www.intel.com/content/www/us/en/programmable/documentation/mwh1410385117325.html"
    ],
    "example": "const result = await orchestrate('specializations/fpga-programming/timing-closure', {\n  designName: 'high_speed_dsp',\n  targetFrequency: 500,\n  currentSlack: -0.5,\n  targetDevice: 'Xilinx Ultrascale+ XCVU13P'\n});",
    "usesAgents": [
      "timing-engineer",
      "fpga-engineer",
      "implementation-engineer"
    ]
  },
  "outgoingEdges": [
    {
      "from": "lib-process:fpga-programming--timing-closure",
      "to": "skill-area:hdl-design",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--timing-closure",
      "to": "skill-area:fpga-synthesis",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 0.7
      }
    },
    {
      "from": "lib-process:fpga-programming--timing-closure",
      "to": "skill-area:timing-closure",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 0.5
      }
    },
    {
      "from": "lib-process:fpga-programming--timing-closure",
      "to": "domain:embedded-systems",
      "kind": "lib_applies_to_domain",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--timing-closure",
      "to": "role:embedded-engineer",
      "kind": "lib_involves_role",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--timing-closure",
      "to": "workflow:hardware-software-integration",
      "kind": "lib_implements_workflow",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--timing-closure",
      "to": "specialization:fpga-programming",
      "kind": "lib_belongs_to_specialization",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-process:fpga-programming--timing-closure",
      "to": "lib-agent:shared--implementation-engineer",
      "kind": "uses_agent",
      "attributes": {
        "weight": 0.8
      }
    }
  ],
  "incomingEdges": []
}