II.
LibraryProcess JSON
Structured · livelib-process:fpga-programming--ip-core-integration
specializations/fpga-programming/ip-core-integration json
Inspect the normalized record payload exactly as the atlas UI reads it.
{
"id": "lib-process:fpga-programming--ip-core-integration",
"_kind": "LibraryProcess",
"_file": "generated-library/processes.yaml",
"_cluster": "generated-library",
"attributes": {
"displayName": "specializations/fpga-programming/ip-core-integration",
"description": "IP Core Integration - Integrate vendor IP cores and custom IP blocks into designs. Configure IP\nparameters, connect interfaces, and verify integration correctness.",
"libraryPath": "library/specializations/fpga-programming/ip-core-integration.js",
"specialization": "fpga-programming",
"references": [
"- Vivado IP Integrator: https://docs.amd.com/r/en-US/ug994-vivado-ip-subsystems",
"- Platform Designer: https://www.intel.com/content/www/us/en/programmable/documentation/jrw1529444674987.html"
],
"example": "const result = await orchestrate('specializations/fpga-programming/ip-core-integration', {\n designName: 'processing_system',\n ipCores: [{ name: 'axi_dma', vendor: 'xilinx' }, { name: 'axi_gpio', vendor: 'xilinx' }],\n targetDevice: 'Zynq-7000',\n interfaceProtocols: ['AXI4', 'AXI4-Lite', 'AXI4-Stream']\n});",
"usesAgents": [
"fpga-engineer",
"verification-engineer"
]
},
"outgoingEdges": [
{
"from": "lib-process:fpga-programming--ip-core-integration",
"to": "skill-area:hdl-design",
"kind": "lib_requires_skill_area",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--ip-core-integration",
"to": "skill-area:fpga-synthesis",
"kind": "lib_requires_skill_area",
"attributes": {
"weight": 0.7
}
},
{
"from": "lib-process:fpga-programming--ip-core-integration",
"to": "domain:embedded-systems",
"kind": "lib_applies_to_domain",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--ip-core-integration",
"to": "role:embedded-engineer",
"kind": "lib_involves_role",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--ip-core-integration",
"to": "workflow:hardware-software-integration",
"kind": "lib_implements_workflow",
"attributes": {
"weight": 1
}
},
{
"from": "lib-process:fpga-programming--ip-core-integration",
"to": "specialization:fpga-programming",
"kind": "lib_belongs_to_specialization",
"attributes": {
"weight": 1
}
}
],
"incomingEdges": []
}