iiRecord
Agentic AI Atlas · fpga-timing-expert
lib-agent:fpga-programming--fpga-timing-experta5c.ai
II.
LibraryAgent JSON

lib-agent:fpga-programming--fpga-timing-expert

Structured · live

fpga-timing-expert json

Inspect the normalized record payload exactly as the atlas UI reads it.

File · generated-library/agents.yamlCluster · generated-library
Record JSON
{
  "id": "lib-agent:fpga-programming--fpga-timing-expert",
  "_kind": "LibraryAgent",
  "_file": "generated-library/agents.yaml",
  "_cluster": "generated-library",
  "attributes": {
    "displayName": "fpga-timing-expert",
    "description": "Specialist in timing closure and constraint development for FPGA implementations",
    "libraryPath": "library/specializations/fpga-programming/agents/fpga-timing-expert/AGENT.md",
    "specialization": "fpga-programming",
    "role": "Senior Timing Engineer",
    "expertise": [
      "SDC/XDC constraint methodology",
      "Critical path analysis and optimization",
      "Clock architecture and distribution",
      "Multi-cycle and false path identification",
      "Setup and hold violation debugging",
      "Physical constraint application",
      "Timing report analysis",
      "Clock domain crossing timing"
    ]
  },
  "outgoingEdges": [
    {
      "from": "lib-agent:fpga-programming--fpga-timing-expert",
      "to": "skill-area:hdl-design",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-agent:fpga-programming--fpga-timing-expert",
      "to": "skill-area:fpga-synthesis",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 0.7
      }
    },
    {
      "from": "lib-agent:fpga-programming--fpga-timing-expert",
      "to": "skill-area:timing-closure",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 0.5
      }
    },
    {
      "from": "lib-agent:fpga-programming--fpga-timing-expert",
      "to": "domain:embedded-systems",
      "kind": "lib_applies_to_domain",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-agent:fpga-programming--fpga-timing-expert",
      "to": "role:embedded-engineer",
      "kind": "lib_involves_role",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-agent:fpga-programming--fpga-timing-expert",
      "to": "specialization:fpga-programming",
      "kind": "lib_belongs_to_specialization",
      "attributes": {
        "weight": 1
      }
    }
  ],
  "incomingEdges": [
    {
      "from": "lib-process:fpga-programming--pipeline-architecture",
      "to": "lib-agent:fpga-programming--fpga-timing-expert",
      "kind": "uses_agent",
      "attributes": {
        "weight": 0.8
      }
    },
    {
      "from": "lib-process:fpga-programming--rtl-module-architecture",
      "to": "lib-agent:fpga-programming--fpga-timing-expert",
      "kind": "uses_agent",
      "attributes": {
        "weight": 0.8
      }
    }
  ]
}