{
  "id": "lib-agent:fpga-programming--cdc-expert",
  "_kind": "LibraryAgent",
  "_file": "generated-library/agents.yaml",
  "_cluster": "generated-library",
  "attributes": {
    "displayName": "cdc-expert",
    "description": "Clock domain crossing specialist with metastability expertise for FPGA designs",
    "libraryPath": "library/specializations/fpga-programming/agents/cdc-expert/AGENT.md",
    "specialization": "fpga-programming",
    "role": "CDC Design Specialist",
    "expertise": [
      "CDC analysis and verification",
      "Synchronizer design and MTBF calculation",
      "Async FIFO design with Gray code",
      "Handshake protocol design",
      "Reset domain crossing",
      "CDC constraint development",
      "Multi-clock architecture",
      "Metastability theory"
    ]
  },
  "outgoingEdges": [
    {
      "from": "lib-agent:fpga-programming--cdc-expert",
      "to": "skill-area:hdl-design",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-agent:fpga-programming--cdc-expert",
      "to": "skill-area:fpga-synthesis",
      "kind": "lib_requires_skill_area",
      "attributes": {
        "weight": 0.7
      }
    },
    {
      "from": "lib-agent:fpga-programming--cdc-expert",
      "to": "domain:embedded-systems",
      "kind": "lib_applies_to_domain",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-agent:fpga-programming--cdc-expert",
      "to": "role:embedded-engineer",
      "kind": "lib_involves_role",
      "attributes": {
        "weight": 1
      }
    },
    {
      "from": "lib-agent:fpga-programming--cdc-expert",
      "to": "specialization:fpga-programming",
      "kind": "lib_belongs_to_specialization",
      "attributes": {
        "weight": 1
      }
    }
  ],
  "incomingEdges": []
}